Commit 1d67c8d9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc-fixes-5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Here are the patches for this week that came as the fallout of the
  merge window:

   - Two fixes for the NVidia memory controller driver

   - multiple defconfig files get patched to turn CONFIG_FB back on
     after that is no longer selected by CONFIG_DRM

   - ffa and scmpi firmware drivers fixes, mostly addressing compiler
     and documentation warnings

   - Platform specific fixes for device tree files on ASpeed, Renesas
     and NVidia SoC, mostly for recent regressions.

   - A workaround for a regression on the USB PHY with devlink when the
     usb-nop-xceiv driver is not available until the rootfs is mounted.

   - Device tree compiler warnings in Arm Versatile-AB"

* tag 'soc-fixes-5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (35 commits)
  ARM: dts: versatile: Fix up interrupt controller node names
  ARM: multi_v7_defconfig: Make NOP_USB_XCEIV ...
parents ae14c63a 82a1c675
...@@ -52,16 +52,14 @@ properties: ...@@ -52,16 +52,14 @@ properties:
items: items:
- const: marvell,ap806-smmu-500 - const: marvell,ap806-smmu-500
- const: arm,mmu-500 - const: arm,mmu-500
- description: NVIDIA SoCs that program two ARM MMU-500s identically
items:
- description: NVIDIA SoCs that require memory controller interaction - description: NVIDIA SoCs that require memory controller interaction
and may program multiple ARM MMU-500s identically with the memory and may program multiple ARM MMU-500s identically with the memory
controller interleaving translations between multiple instances controller interleaving translations between multiple instances
for improved performance. for improved performance.
items: items:
- enum: - enum:
- const: nvidia,tegra194-smmu - nvidia,tegra194-smmu
- const: nvidia,tegra186-smmu - nvidia,tegra186-smmu
- const: nvidia,smmu-500 - const: nvidia,smmu-500
- items: - items:
- const: arm,mmu-500 - const: arm,mmu-500
......
...@@ -395,7 +395,7 @@ config ARCH_IXP4XX ...@@ -395,7 +395,7 @@ config ARCH_IXP4XX
select IXP4XX_IRQ select IXP4XX_IRQ
select IXP4XX_TIMER select IXP4XX_TIMER
# With the new PCI driver this is not needed # With the new PCI driver this is not needed
select NEED_MACH_IO_H if PCI_IXP4XX_LEGACY select NEED_MACH_IO_H if IXP4XX_PCI_LEGACY
select USB_EHCI_BIG_ENDIAN_DESC select USB_EHCI_BIG_ENDIAN_DESC
select USB_EHCI_BIG_ENDIAN_MMIO select USB_EHCI_BIG_ENDIAN_MMIO
help help
......
...@@ -4,6 +4,7 @@ ...@@ -4,6 +4,7 @@
#include "aspeed-g5.dtsi" #include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h> #include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h> #include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/interrupt-controller/irq.h>
/{ /{
model = "ASRock E3C246D4I BMC"; model = "ASRock E3C246D4I BMC";
...@@ -73,7 +74,8 @@ &uart5 { ...@@ -73,7 +74,8 @@ &uart5 {
&vuart { &vuart {
status = "okay"; status = "okay";
aspeed,sirq-active-high; aspeed,lpc-io-reg = <0x2f8>;
aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
}; };
&mac0 { &mac0 {
......
...@@ -406,14 +406,14 @@ power-supply@69 { ...@@ -406,14 +406,14 @@ power-supply@69 {
reg = <0x69>; reg = <0x69>;
}; };
power-supply@6a { power-supply@6b {
compatible = "ibm,cffps"; compatible = "ibm,cffps";
reg = <0x6a>; reg = <0x6b>;
}; };
power-supply@6b { power-supply@6d {
compatible = "ibm,cffps"; compatible = "ibm,cffps";
reg = <0x6b>; reg = <0x6d>;
}; };
}; };
...@@ -2832,6 +2832,7 @@ &pinctrl_emmc_default { ...@@ -2832,6 +2832,7 @@ &pinctrl_emmc_default {
&emmc { &emmc {
status = "okay"; status = "okay";
clk-phase-mmc-hs200 = <180>, <180>;
}; };
&fsim0 { &fsim0 {
......
...@@ -280,10 +280,7 @@ &gpio0 { ...@@ -280,10 +280,7 @@ &gpio0 {
/*W0-W7*/ "","","","","","","","", /*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","", /*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","", /*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","", /*Z0-Z7*/ "","","","","","","","";
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
pin_mclr_vpp { pin_mclr_vpp {
gpio-hog; gpio-hog;
......
...@@ -136,10 +136,7 @@ &gpio0 { ...@@ -136,10 +136,7 @@ &gpio0 {
/*W0-W7*/ "","","","","","","","", /*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","", /*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","", /*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","", /*Z0-Z7*/ "","","","","","","","";
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
}; };
&fmc { &fmc {
...@@ -189,6 +186,7 @@ &emmc_controller { ...@@ -189,6 +186,7 @@ &emmc_controller {
&emmc { &emmc {
status = "okay"; status = "okay";
clk-phase-mmc-hs200 = <36>, <270>;
}; };
&fsim0 { &fsim0 {
......
...@@ -195,16 +195,15 @@ amba { ...@@ -195,16 +195,15 @@ amba {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
vic: intc@10140000 { vic: interrupt-controller@10140000 {
compatible = "arm,versatile-vic"; compatible = "arm,versatile-vic";
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
reg = <0x10140000 0x1000>; reg = <0x10140000 0x1000>;
clear-mask = <0xffffffff>;
valid-mask = <0xffffffff>; valid-mask = <0xffffffff>;
}; };
sic: intc@10003000 { sic: interrupt-controller@10003000 {
compatible = "arm,versatile-sic"; compatible = "arm,versatile-sic";
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
......
...@@ -7,7 +7,7 @@ / { ...@@ -7,7 +7,7 @@ / {
amba { amba {
/* The Versatile PB is using more SIC IRQ lines than the AB */ /* The Versatile PB is using more SIC IRQ lines than the AB */
sic: intc@10003000 { sic: interrupt-controller@10003000 {
clear-mask = <0xffffffff>; clear-mask = <0xffffffff>;
/* /*
* Valid interrupt lines mask according to * Valid interrupt lines mask according to
......
...@@ -57,10 +57,7 @@ CONFIG_DRM=y ...@@ -57,10 +57,7 @@ CONFIG_DRM=y
CONFIG_DRM_DISPLAY_CONNECTOR=y CONFIG_DRM_DISPLAY_CONNECTOR=y
CONFIG_DRM_SIMPLE_BRIDGE=y CONFIG_DRM_SIMPLE_BRIDGE=y
CONFIG_DRM_PL111=y CONFIG_DRM_PL111=y
CONFIG_FB_MODE_HELPERS=y CONFIG_FB=y
CONFIG_FB_MATROX=y
CONFIG_FB_MATROX_MILLENIUM=y
CONFIG_FB_MATROX_MYSTIQUE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_VGA_CONSOLE is not set # CONFIG_VGA_CONSOLE is not set
CONFIG_LOGO=y CONFIG_LOGO=y
......
...@@ -821,7 +821,7 @@ CONFIG_USB_ISP1760=y ...@@ -821,7 +821,7 @@ CONFIG_USB_ISP1760=y
CONFIG_USB_HSIC_USB3503=y CONFIG_USB_HSIC_USB3503=y
CONFIG_AB8500_USB=y CONFIG_AB8500_USB=y
CONFIG_KEYSTONE_USB_PHY=m CONFIG_KEYSTONE_USB_PHY=m
CONFIG_NOP_USB_XCEIV=m CONFIG_NOP_USB_XCEIV=y
CONFIG_AM335X_PHY_USB=m CONFIG_AM335X_PHY_USB=m
CONFIG_TWL6030_USB=m CONFIG_TWL6030_USB=m
CONFIG_USB_GPIO_VBUS=y CONFIG_USB_GPIO_VBUS=y
......
...@@ -64,11 +64,9 @@ CONFIG_DRM_PANEL_SIMPLE=y ...@@ -64,11 +64,9 @@ CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_DISPLAY_CONNECTOR=y CONFIG_DRM_DISPLAY_CONNECTOR=y
CONFIG_DRM_SIMPLE_BRIDGE=y CONFIG_DRM_SIMPLE_BRIDGE=y
CONFIG_DRM_PL111=y CONFIG_DRM_PL111=y
CONFIG_FB_MODE_HELPERS=y CONFIG_FB=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_LOGO=y CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=y CONFIG_SOUND=y
CONFIG_SND=y CONFIG_SND=y
# CONFIG_SND_DRIVERS is not set # CONFIG_SND_DRIVERS is not set
......
...@@ -135,6 +135,7 @@ CONFIG_DRM_SII902X=y ...@@ -135,6 +135,7 @@ CONFIG_DRM_SII902X=y
CONFIG_DRM_SIMPLE_BRIDGE=y CONFIG_DRM_SIMPLE_BRIDGE=y
CONFIG_DRM_I2C_ADV7511=y CONFIG_DRM_I2C_ADV7511=y
CONFIG_DRM_I2C_ADV7511_AUDIO=y CONFIG_DRM_I2C_ADV7511_AUDIO=y
CONFIG_FB=y
CONFIG_FB_SH_MOBILE_LCDC=y CONFIG_FB_SH_MOBILE_LCDC=y
CONFIG_BACKLIGHT_PWM=y CONFIG_BACKLIGHT_PWM=y
CONFIG_BACKLIGHT_AS3711=y CONFIG_BACKLIGHT_AS3711=y
......
...@@ -61,6 +61,10 @@ CONFIG_INPUT_TOUCHSCREEN=y ...@@ -61,6 +61,10 @@ CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_TOUCHSCREEN_BU21013=y CONFIG_TOUCHSCREEN_BU21013=y
CONFIG_TOUCHSCREEN_CY8CTMA140=y CONFIG_TOUCHSCREEN_CY8CTMA140=y
CONFIG_TOUCHSCREEN_CYTTSP_CORE=y
CONFIG_TOUCHSCREEN_CYTTSP_SPI=y
CONFIG_TOUCHSCREEN_MMS114=y
CONFIG_TOUCHSCREEN_ZINITIX=y
CONFIG_INPUT_MISC=y CONFIG_INPUT_MISC=y
CONFIG_INPUT_AB8500_PONKEY=y CONFIG_INPUT_AB8500_PONKEY=y
CONFIG_INPUT_GPIO_VIBRA=y CONFIG_INPUT_GPIO_VIBRA=y
...@@ -100,6 +104,7 @@ CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI=y ...@@ -100,6 +104,7 @@ CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI=y
CONFIG_DRM_PANEL_SONY_ACX424AKP=y CONFIG_DRM_PANEL_SONY_ACX424AKP=y
CONFIG_DRM_LIMA=y CONFIG_DRM_LIMA=y
CONFIG_DRM_MCDE=y CONFIG_DRM_MCDE=y
CONFIG_FB=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_KTD253=y CONFIG_BACKLIGHT_KTD253=y
CONFIG_BACKLIGHT_GPIO=y CONFIG_BACKLIGHT_GPIO=y
......
...@@ -60,7 +60,7 @@ CONFIG_DRM_PANEL_SIMPLE=y ...@@ -60,7 +60,7 @@ CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_DISPLAY_CONNECTOR=y CONFIG_DRM_DISPLAY_CONNECTOR=y
CONFIG_DRM_SIMPLE_BRIDGE=y CONFIG_DRM_SIMPLE_BRIDGE=y
CONFIG_DRM_PL111=y CONFIG_DRM_PL111=y
CONFIG_FB_MODE_HELPERS=y CONFIG_FB=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_LOGO=y CONFIG_LOGO=y
CONFIG_SOUND=y CONFIG_SOUND=y
...@@ -88,8 +88,6 @@ CONFIG_NFSD=y ...@@ -88,8 +88,6 @@ CONFIG_NFSD=y
CONFIG_NFSD_V3=y CONFIG_NFSD_V3=y
CONFIG_NLS_CODEPAGE_850=m CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_ISO8859_1=m CONFIG_NLS_ISO8859_1=m
CONFIG_FONTS=y
CONFIG_FONT_ACORN_8x8=y
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_KERNEL=y
......
...@@ -11,9 +11,6 @@ CONFIG_CPUSETS=y ...@@ -11,9 +11,6 @@ CONFIG_CPUSETS=y
# CONFIG_NET_NS is not set # CONFIG_NET_NS is not set
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
CONFIG_PROFILING=y CONFIG_PROFILING=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_VEXPRESS=y CONFIG_ARCH_VEXPRESS=y
CONFIG_ARCH_VEXPRESS_DCSCB=y CONFIG_ARCH_VEXPRESS_DCSCB=y
CONFIG_ARCH_VEXPRESS_TC2_PM=y CONFIG_ARCH_VEXPRESS_TC2_PM=y
...@@ -23,14 +20,17 @@ CONFIG_MCPM=y ...@@ -23,14 +20,17 @@ CONFIG_MCPM=y
CONFIG_VMSPLIT_2G=y CONFIG_VMSPLIT_2G=y
CONFIG_NR_CPUS=8 CONFIG_NR_CPUS=8
CONFIG_ARM_PSCI=y CONFIG_ARM_PSCI=y
CONFIG_CMA=y
CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=ttyAMA0" CONFIG_CMDLINE="console=ttyAMA0"
CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE=y
CONFIG_VFP=y CONFIG_VFP=y
CONFIG_NEON=y CONFIG_NEON=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_CMA=y
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y CONFIG_UNIX=y
...@@ -43,7 +43,6 @@ CONFIG_IP_PNP_BOOTP=y ...@@ -43,7 +43,6 @@ CONFIG_IP_PNP_BOOTP=y
CONFIG_NET_9P=y CONFIG_NET_9P=y
CONFIG_NET_9P_VIRTIO=y CONFIG_NET_9P_VIRTIO=y
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
CONFIG_DMA_CMA=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
...@@ -59,7 +58,6 @@ CONFIG_VIRTIO_BLK=y ...@@ -59,7 +58,6 @@ CONFIG_VIRTIO_BLK=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_VIRTIO=y CONFIG_SCSI_VIRTIO=y
CONFIG_ATA=y CONFIG_ATA=y
# CONFIG_SATA_PMP is not set
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_NET=y
CONFIG_SMC91X=y CONFIG_SMC91X=y
...@@ -81,11 +79,9 @@ CONFIG_DRM=y ...@@ -81,11 +79,9 @@ CONFIG_DRM=y
CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_SII902X=y CONFIG_DRM_SII902X=y
CONFIG_DRM_PL111=y CONFIG_DRM_PL111=y
CONFIG_FB_MODE_HELPERS=y CONFIG_FB=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_LOGO=y CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=y CONFIG_SOUND=y
CONFIG_SND=y CONFIG_SND=y
# CONFIG_SND_DRIVERS is not set # CONFIG_SND_DRIVERS is not set
...@@ -136,10 +132,11 @@ CONFIG_ROOT_NFS=y ...@@ -136,10 +132,11 @@ CONFIG_ROOT_NFS=y
CONFIG_9P_FS=y CONFIG_9P_FS=y
CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_1=y
# CONFIG_CRYPTO_HW is not set
CONFIG_DMA_CMA=y
CONFIG_DEBUG_INFO=y CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y CONFIG_DETECT_HUNG_TASK=y
# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHED_DEBUG is not set
CONFIG_DEBUG_USER=y CONFIG_DEBUG_USER=y
# CONFIG_CRYPTO_HW is not set
...@@ -948,6 +948,10 @@ usb@3550000 { ...@@ -948,6 +948,10 @@ usb@3550000 {
<&bpmp TEGRA194_CLK_XUSB_SS>, <&bpmp TEGRA194_CLK_XUSB_SS>,
<&bpmp TEGRA194_CLK_XUSB_FS>; <&bpmp TEGRA194_CLK_XUSB_FS>;
clock-names = "dev", "ss", "ss_src", "fs_src"; clock-names = "dev", "ss", "ss_src", "fs_src";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA194_SID_XUSB_DEV>;
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBB>, power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBB>,
<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>; <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
power-domain-names = "dev", "ss"; power-domain-names = "dev", "ss";
...@@ -977,6 +981,10 @@ usb@3610000 { ...@@ -977,6 +981,10 @@ usb@3610000 {
"xusb_ss", "xusb_ss_src", "xusb_hs_src", "xusb_ss", "xusb_ss_src", "xusb_hs_src",
"xusb_fs_src", "pll_u_480m", "clk_m", "xusb_fs_src", "pll_u_480m", "clk_m",
"pll_e"; "pll_e";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA194_SID_XUSB_HOST>;
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>, power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>; <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
...@@ -2469,6 +2477,11 @@ sound { ...@@ -2469,6 +2477,11 @@ sound {
* for 8x and 11.025x sample rate streams. * for 8x and 11.025x sample rate streams.
*/ */
assigned-clock-rates = <258000000>; assigned-clock-rates = <258000000>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_APEDMAR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_APEDMAW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA194_SID_APE>;
}; };
tcu: tcu { tcu: tcu {
......
...@@ -82,10 +82,10 @@ scif0: serial@1004b800 { ...@@ -82,10 +82,10 @@ scif0: serial@1004b800 {
<GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", interrupt-names = "eri", "rxi", "txi",
"bri", "dri", "tei"; "bri", "dri", "tei";
clocks = <&cpg CPG_MOD R9A07G044_CLK_SCIF0>; clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>;
clock-names = "fck"; clock-names = "fck";
power-domains = <&cpg>; power-domains = <&cpg>;
resets = <&cpg R9A07G044_CLK_SCIF0>; resets = <&cpg R9A07G044_SCIF0_RST_SYSTEM_N>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -30,8 +30,9 @@ enum clk_ids { ...@@ -30,8 +30,9 @@ enum clk_ids {
CLK_PLL2_DIV20, CLK_PLL2_DIV20,
CLK_PLL3, CLK_PLL3,
CLK_PLL3_DIV2, CLK_PLL3_DIV2,
CLK_PLL3_DIV2_4,
CLK_PLL3_DIV2_4_2,
CLK_PLL3_DIV4, CLK_PLL3_DIV4,
CLK_PLL3_DIV8,
CLK_PLL4, CLK_PLL4,
CLK_PLL5, CLK_PLL5,
CLK_PLL5_DIV2, CLK_PLL5_DIV2,
...@@ -42,12 +43,13 @@ enum clk_ids { ...@@ -42,12 +43,13 @@ enum clk_ids {
}; };
/* Divider tables */ /* Divider tables */
static const struct clk_div_table dtable_3b[] = { static const struct clk_div_table dtable_1_32[] = {
{0, 1}, {0, 1},
{1, 2}, {1, 2},
{2, 4}, {2, 4},
{3, 8}, {3, 8},
{4, 32}, {4, 32},
{0, 0},
}; };
static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = { static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = {
...@@ -66,47 +68,56 @@ static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = { ...@@ -66,47 +68,56 @@ static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = {
DEF_FIXED(".pll2_div20", CLK_PLL2_DIV20, CLK_PLL2, 1, 20), DEF_FIXED(".pll2_div20", CLK_PLL2_DIV20, CLK_PLL2, 1, 20),
DEF_FIXED(".pll3_div2", CLK_PLL3_DIV2, CLK_PLL3, 1, 2), DEF_FIXED(".pll3_div2", CLK_PLL3_DIV2, CLK_PLL3, 1, 2),
DEF_FIXED(".pll3_div2_4", CLK_PLL3_DIV2_4, CLK_PLL3_DIV2, 1, 4),
DEF_FIXED(".pll3_div2_4_2", CLK_PLL3_DIV2_4_2, CLK_PLL3_DIV2_4, 1, 2),
DEF_FIXED(".pll3_div4", CLK_PLL3_DIV4, CLK_PLL3, 1, 4), DEF_FIXED(".pll3_div4", CLK_PLL3_DIV4, CLK_PLL3, 1, 4),
DEF_FIXED(".pll3_div8", CLK_PLL3_DIV8, CLK_PLL3, 1, 8),
/* Core output clk */ /* Core output clk */
DEF_FIXED("I", R9A07G044_CLK_I, CLK_PLL1, 1, 1), DEF_FIXED("I", R9A07G044_CLK_I, CLK_PLL1, 1, 1),
DEF_DIV("P0", R9A07G044_CLK_P0, CLK_PLL2_DIV16, DIVPL2A, DEF_DIV("P0", R9A07G044_CLK_P0, CLK_PLL2_DIV16, DIVPL2A,
dtable_3b, CLK_DIVIDER_HIWORD_MASK), dtable_1_32, CLK_DIVIDER_HIWORD_MASK),
DEF_FIXED("TSU", R9A07G044_CLK_TSU, CLK_PLL2_DIV20, 1, 1), DEF_FIXED("TSU", R9A07G044_CLK_TSU, CLK_PLL2_DIV20, 1, 1),
DEF_DIV("P1", R9A07G044_CLK_P1, CLK_PLL3_DIV8, DEF_DIV("P1", R9A07G044_CLK_P1, CLK_PLL3_DIV2_4,
DIVPL3B, dtable_3b, CLK_DIVIDER_HIWORD_MASK), DIVPL3B, dtable_1_32, CLK_DIVIDER_HIWORD_MASK),
DEF_DIV("P2", R9A07G044_CLK_P2, CLK_PLL3_DIV2_4_2,
DIVPL3A, dtable_1_32, CLK_DIVIDER_HIWORD_MASK),
}; };
static struct rzg2l_mod_clk r9a07g044_mod_clks[] = { static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {
DEF_MOD("gic", R9A07G044_CLK_GIC600, DEF_MOD("gic", R9A07G044_GIC600_GICCLK, R9A07G044_CLK_P1,
R9A07G044_CLK_P1, 0x514, 0),
0x514, BIT(0), (BIT(0) | BIT(1))), DEF_MOD("ia55_pclk", R9A07G044_IA55_PCLK, R9A07G044_CLK_P2,
DEF_MOD("ia55", R9A07G044_CLK_IA55, 0x518, 0),
R9A07G044_CLK_P1, DEF_MOD("ia55_clk", R9A07G044_IA55_CLK, R9A07G044_CLK_P1,
0x518, (BIT(0) | BIT(1)), BIT(0)), 0x518, 1),
DEF_MOD("scif0", R9A07G044_CLK_SCIF0, DEF_MOD("scif0", R9A07G044_SCIF0_CLK_PCK, R9A07G044_CLK_P0,
R9A07G044_CLK_P0, 0x584, 0),
0x584, BIT(0), BIT(0)), DEF_MOD("scif1", R9A07G044_SCIF1_CLK_PCK, R9A07G044_CLK_P0,
DEF_MOD("scif1", R9A07G044_CLK_SCIF1, 0x584, 1),
R9A07G044_CLK_P0, DEF_MOD("scif2", R9A07G044_SCIF2_CLK_PCK, R9A07G044_CLK_P0,
0x584, BIT(1), BIT(1)), 0x584, 2),
DEF_MOD("scif2", R9A07G044_CLK_SCIF2, DEF_MOD("scif3", R9A07G044_SCIF3_CLK_PCK, R9A07G044_CLK_P0,
R9A07G044_CLK_P0, 0x584, 3),
0x584, BIT(2), BIT(2)), DEF_MOD("scif4", R9A07G044_SCIF4_CLK_PCK, R9A07G044_CLK_P0,
DEF_MOD("scif3", R9A07G044_CLK_SCIF3, 0x584, 4),
R9A07G044_CLK_P0, DEF_MOD("sci0", R9A07G044_SCI0_CLKP, R9A07G044_CLK_P0,
0x584, BIT(3), BIT(3)), 0x588, 0),
DEF_MOD("scif4", R9A07G044_CLK_SCIF4, };
R9A07G044_CLK_P0,
0x584, BIT(4), BIT(4)), static struct rzg2l_reset r9a07g044_resets[] = {
DEF_MOD("sci0", R9A07G044_CLK_SCI0, DEF_RST(R9A07G044_GIC600_GICRESET_N, 0x814, 0),
R9A07G044_CLK_P0, DEF_RST(R9A07G044_GIC600_DBG_GICRESET_N, 0x814, 1),